CS-E9302 development board
Users Manual
Rev.A, July 2008
Copyright(c) 2008, OLIMEX Ltd, All rights reserved
INTRODUCTION:
CS-E9302 is powerful development board for 200MHz Cirrus Logic EP9302
ARM920T microprocessors with two USB hosts, two RS232 ports, 100Mbit
Ethernet, SD-MMC card, 16MB NOR Flash, 32MB SDRAM, IrDA
transciever, JTAG, UEXT, EXT, ADC connectors for additional peripherials.
BOARD FEATURES:
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MCU: EP9302 ARM920T 200Mhz, 16+16KB instruction and data
cache, MMU, SDRAM, SRAM, FLASH external bus controller 100Mhz
bus, 100Mbit Ethernet MAC, two UARTS, two USB 2.0 ports, IrDA,
ADC, SPI, I2S Audio, AC97, DMA 12 ch, RTC, dual PLL, WDT, 2- 16
bit, 1- 32 bit TIMERS, boot ROM, interrupt controller;
External SDRAM 32MB (16MB x16bit) 7.5 ns /133MHz;
External Flash 16MB (8MB x16 bit) 80 ns;
ETHERNET 10/100 PHY KS8721BL;
2 x RS232 drivers and connectors;
2 x USB host connectors;
SD/MMC card;
IrDA transciever on board;
UEXT connector with I2C, SPI, RS232 and power supply for
connecting add-on modules like RF link, MP3, etc available from
Olimex;
JTAG interface;
ADC extension port;
Power supply plug in jack;
Linux 2.4
,
Linux 2.6
and
NetBSD
sources and pre-build images
ready to load with Redboot are available on the supplement CD;
Dimensions: 110x90 mm (4.3 x 3.5").
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ELECTROSTATIC WARNING:
The CS-E9302 development board is shipped in protective anti-static
packaging. The board must not be subject to high electrostatic potentials.
General practice for working with static sensitive devices should be applied
when working with this board.
BOARD USE REQUIREMENTS:
Cables:
Two DB9 female-female null modem type for connection with
serial COM port of PC host.
Crossed LAN cable for connection with PC or straight LAN
cable for connection with switch or router.
+5V/1A regulated power source.
ARM-JTAG, ARM-USB-OCD, ARM-USB-TINY or other
compatible tool only if you want to develop with JTAG,
usually with the pre-loaded linux RTOS this is not
necessary.
The boards are delivered pre-loaded with Linux 2.6.
Hardware:
Software:
PROCESSOR FEATURES:
The EP9302 system-on-chip processor has the following features:
● 200 MHz ARM920T Processor
▬
16 KByte data cache and 16 KByte instruction cache
▬
MMU enabling Linux® and Windows® CE
▬
100 MHz system bus
● MaverickKey™ IDs for Digital Rights Management or Design IP
Security
▬
32-bit unique ID
▬
128-bit random ID
● Integrated Peripheral Interfaces
▬
1/10/100 Mbps Ethernet MAC
▬
Two-port USB 2.0 Full Speed host (OHCI)
▬
Two UARTs (16550 Type)
▬
IrDA interface, slow and fast mode
▬
Analog-to-Digital Converter (ADC)
▬
Serial Peripheral Interface (SPI) port
▬
AC ‘97 interface
▬
I2S interface, up to 2 channels
● External Memory Options
▬
16-bit SDRAM interface, up to four banks
▬
16/8-bit SRAM/Flash/ROM interface (I/F)
▬
Serial EEPROM interface
● Internal Peripherals
▬
Real-Time clock with software trim
▬
12 DMA channels for data transfer that maximizes system
performance
▬
Boot ROM
▬
Dual PLLs control all clock domains
▬
Watchdog timer
▬
Two general purpose 16-bit timers
▬
General purpose 32-bit timer
▬
40-bit debug timer
● General-Purpose I/Os
▬
16 enhanced GPIOs including interrupt capability
▬
31 additional optional GPIOs multiplexed on peripherals.
EP9302 BLOCK DIAGRAM
MEMORY MAP:
Address Range
Sync Memory Boot
ASD0 Pin = 1
0xF000_0000 – 0xF200_0000 (32MB
on board SDRAM)
0xE000_0000 - 0xEFFF_FFFF
0xD000_0000 - 0xDFFF_FFFF
0xC000_0000 - 0xCFFF_FFFF
0x9000_0000 - 0xBFFF_FFFF
0x8080_0000 - 0x8FFF_FFFF
0x8010_0000 - 0x807F_FFFF
0x8000_0000 - 0x800F_FFFF
0x7000_0000 - 0x7FFF_FFFF
0x6000_0000 – 0x6100_0000 (16MB on
board NOR flash)
0x5000_0000 - 0x5FFF_FFFF
0x4000_0000 - 0x4FFF_FFFF
0x3000_0000 - 0x3FFF_FFFF
0x2000_0000 - 0x2FFF_FFFF
0x1000_0000 - 0x1FFF_FFFF
0x0001_0000 - 0x0FFF_FFFF
Async memory (nCS0)
Sync memory (nSDCE2)
Sync memory (nSDCE1)
Sync memory (nSDCE0)
Not Used
APB mapped registers
Reserved
AHB mapped registers
Async memory (nCS7)
Async memory (nCS6)
Reserved
Reserved
Async memory (nCS3)
Async memory (nCS2)
Async memory (nCS1)
Sync memory (nSDCE3)
Async Memory Boot
ASD0 Pin = 0
Sync memory (nSDCE3)
Sync memory (nSDCE2)
Sync memory (nSDCE1)
Sync memory (nSDCE0)
Not Used
APB mapped registers
Reserved
AHB mapped registers
Async memory (nCS7)
Async memory (nCS6)
Reserved
Reserved
Async memory (nCS3)
Async memory (nCS2)
Async memory (nCS1)
Async memory (nCS0)
SCHEMATIC:
